Sub-forums Agenda

AIArtificial Intelligence HPCHigh-Performance Computing SWSoftware & Ecosystem EmbeddedEmbedded System AutoAutomotive Electronics EDAEDA EdgeCutting-edge Technology Innovation InvestInvestment and M&A EduEducation & Talent Development

Artificial Intelligence
Host：
Xiaoyan Xiang Processor Architect, Xuantie, DAMO Academy
Wei Chen Executive Vice President, Stream Computing; Vice Chairman, RISC-V International AI/ML SIG
7/18 9:00-17:00Zhangjiang Hall

Time	Duration	Title	Speaker
9:00	15^'	Understanding the RISC-V Extensions for AI	Krste Asanovic Co-Founder & Chief Architect, SiFive
9:15	15^'	RISC-V is AI-Native: Why the Fastest-Moving Domain Needs the Fastest-Moving Architecture	Philipp Tomsich Chief Technologist & Founder, VRULL GmbH Vice Chair of the Technical Steering Committee, RISC-V International
9:30	15^'	RISC-V AME: A Scalable Matrix Extension for AI	Siqi Zhao Technical Expert, Alibaba Damo Academy Chair of the RISC-V International AME TG
9:45	15^'	Driving SoC Innovations for Large-Scale AI/ML with RISC-V Processors	Charlie Su President and CTO, Andes Technology
10:00	15^'	Configurable High-performance Interconnect Architectures to Accelerate RISC-V AI/ML and ADAS SoCs	Luan Hao Chief Architect, Arteris
10:15	30^'	Tea Break	-
10:45	15^'	Technological Innovations and Applications of LLM on RISC-V Architecture	Yihao Huang Director of Solutions, Zhihe Computing
11:00	15^'	Nuclei AI Library: Accelerating AI Inference with RISC-V V Extension	Zhuo Shu Senior Embedded Software Engineer, Nuclei
11:15	15^'	Innovation and Applications of RISC-V Chips	Jianyu Li Director of Market Promotion, ESWIN Computing
11:30	15^'	RISC-V Powered AI Innovation: Real-World Practices of Sector-Specific Intelligent Agents	Zhengyu Xiao AI Application Technology Director, StreamComputing
11:45	15^'	XSAI: Hardware Support for Modern LLM Kernels in a CPU Paradigm	Yaoyang Zhou Senior Engineer, Beijing Institute of Open Source Chip
12:00	90^'	Lunch	-
13:30	15^'	Building a Scalable AI/ML Software Stack for RISC-V: From PyTorch to Deployment on SiFive Intelligence XM Platforms	Phoebe Chen Senior Engineer, SiFive
13:45	15^'	XuanTie LLM Model Deployment and Optimization Practices	Peng Xu Senior Development Engineer, Alibaba DAMO Academy
14:00	15^'	High-Performance AI Large Model Workstation Based on RISC-V Architecture	Yumo Yang Technical Expert, China Telecom Research Institute
14:15	15^'	Optimizing Triton for RISC-V Heterogenous AI Computing	Hualin Wu CTO, Terapines Technology Ltd.
14:30	15^'	Out-of-Order RVV: Dynamic Scheduling to Boost AI Computing Efficiency	Jin Cui Chief Architect, StarFive Technology
14:45	15^'	Enable RISC-V-Accelerated Ray for AI Workloads	Tiejun Chen RISC-V International Ambassador
15:00	30^'	Tea Break	-
15:30	15^'	Enabling Sparse Model Inference: A Micro-Kernel Aware Approach for Optimized Libraries on the RISC-V	Heng-Kuan Lee Deputy Director, RD-Compute Acceleration Division, Andes
15:45	15^'	Design and Practice of Triton Operator Compiler for RISC-V Homogeneous AI-CPU Architecture	Jinghui Huang AI Software Architect, SpacemiT
16:00	15^'	PerfXLM 2.0: New Progress in Large Model Inference Framework on RISC-V	Xianyi Zhang Founder & CEO, PerfXLab Creator & Maintainer, OpenBLAS
16:15	15^'	Prototyping Verification Practice Based on Xuantie Processor AI Application Scenarios	Feng Niu Product Sales Director, UniVista Hui Li Senior R&D Engineer, Alibaba DAMO Academy
16:30	15^'	Open-Source Operating System Empowers AI Computing on RISC-V Architecture	Wenzhu Wang Director of the Fundamental Software Department, Haihe Laboratory of ITAI
16:45	15^'	OpenHarmony + AI: Driving Commercial Breakthroughs and Industrial Innovation for RISC-V Architecture	Dawu Yu Vice President, Jiangsu Run Kaihong Digital Technology Co., Ltd.

High-Performance Computing
Host：
Jianyi Meng CEO of Zhihe Computing, Chief Scientist at Alibaba DAMO Academy, Rotating Chair of RVEI Technical Committee
Tao Xu Founder & CEO, StarFive Technology
7/18 9:00-17:15Inspire Hall

Time	Duration	Title	Speaker
9:00	15^'	XiangShan Open-Source IP Evolution: From CPU to Compute Subsystem	Jian Zhang Product Manager, BOSC
9:15	15^'	The Continually Evolving XuanTie Processor Series	Haoyan Jia Staff Engineer, Alibaba DAMO Academy
9:30	15^'	Proposal for “Leverage RISC-V for High Performance Computing”	Frankwell Lin Board of Director, RISC-V International Chairman & CEO, Andes
9:45	15^'	Nuclei’s High-Performance UX1030H Processor IP with Full RVA23 Feature Support	Nathan Ma AVP of Marketing and Strategy, Nuclei
10:00	15^'	Scaling RISC-V Systems for High-Performance Computing Architectures	Yan Zhang Principal FAE, SiFive Cunrong Feng Senior FAE manager, Arteris
10:15	30^'	Tea Break	-
10:45	15^'	StarNoC Mesh-Topology Cache-Coherent NoC Implementation Practices Targeting RISC-V	Jay Zhou General Manager of IP BU, StarFive Technology
11:00	15^'	UR-DP1000: High-Performance Octa-Core 64-bit RISC-V Microprocessor	Jiang Jiang Executive President and CTO, UltraRlSc Technology
11:15	15^'	Driving Open-Source Innovation: China's RISC-V High-Performance Computing Initiative	Qingyuan Ren Business VP, RiVAI Technologies
11:30	15^'	RISC-V Server Features of SpacemiT SoCs	Lv Zheng Chief RISC-V Server Architect, SpacemiT
11:45	15^'	RISC-V + DSA: The Architectural Imperative Reshaping Compute Paradigms	Aglaia Kong Founder & CEO, LeapFive
12:00	90^'	Lunch	-
13:30	15^'	Innovative High-Performance Processor Implementation under RISC-V Architecture	Chang Liu Director of CPU Design, Zhihe Computing
13:45	15^'	Progress and Prospects of RISC-V Software Ecosystem in HPC/Server Field	Devin Xu Senior Director of Software and Eco, Lanxin Computing
14:00	15^'	Application Practice of YiHua's Self-Developed RISC-V Core on DPU	Zhaoming Hu Vice President, EHTech
14:15	15^'	RISC-V in the AI Era: Exploring Industry Adoption in Data Centers	Yanan Liu Director of Chip Technology, Mobile Cloud
14:30	15^'	Evaluation and Prospects of RISC-V Base Instruction Set in Data Center Context	Junjie Hou R&D Engineer, ByteDance
14:45	15^'	Intelligent Compression Applications and Optimizations Targeting RISC-V Video Transcoder Cards	Qian Wei Researcher, China Telecommunication Research Institute
15:00	30^'	Tea Break	-
15:30	15^'	RISC-V CoVE Implementation In Privileged Firmware	Xiaoxia Cui Senior Security Expert, Alibaba DAMO Academy
15:45	15^'	Exploration and Practice of RISC-V Applications in Carrier Services	Xiaowei Wu Project Manager, China Mobile Research Institute
16:00	15^'	Ventus GPGPU: Latest Advancements in a High-Performance Full-Stack Open-Source GPGPU Based on RISC-V	Mingyuan Ma PhD Student, School of Integrated Circuits, Tsinghua University Yuhan Wang Master Student, School of Integrated Circuits, Tsinghua University
16:15	15^'	RISC-V Heterogenous Programming Paradigm: Atomic I/O Enqueue and IOMMU GIPC extensions	Ren Guo Staff Engineer, Alibaba DAMO Academy
16:30	15^'	RISC-V Instruction Extensions for Radio Signal Modulation Recognition	Meng Li Faculty of School of Microelectronics of School of Electronic and Information Engineering, Xi’an Jiaotong University
16:45	15^'	Fine-Grained Calibration of RISC-V Simulators via Cliff Benchmarks	Hao Zhen Engineer, Institute of Computing Technology, Chinese Academy of Sciences Engineer, Beijing Institute of Open Source Chip Qingxuan Kang PhD Candidate at National University of Singapore
17:00	15^'	Enabling Next-Generation Computing Architecture with RISC-V and Virtual Instruction Technology	Yi Yang COO, EVAS Intelligence

Software & Ecosystem
Host：
Yanjun Wu Deputy Director & Chief Engineer, Institute of Software, Chinese Academy of Sciences
Jiangang Duan R&D Director, Intel China
Senior Advisor, Shanghai Open Processor Industry Innovation Center (SOPIC)
7/18 9:00-17:30Room 304

Time	Duration	Title	Speaker
9:00	15^'	openEuler for RISC-V Servers: Challenges & Roadmap	Sheng Qu Senior Engineer, Institute of Software, Chinese Academy of Sciences
9:15	15^'	RedHat's Latest Progress and Trends in the RISC-V Software and Hardware Ecosystem	Wei Fu Principal Software Engineer, Red Hat
9:30	15^'	Recent Advances and Future Roadmap of openKylin on the RISC-V Architecture	Zhuoheng Li RISC-V SIG Maintainer, openKylin
9:45	15^'	The Evolution of the RISC-V Toolchain: A Year in Review and the Road Ahead	Kito Cheng RISC-V Toolchain Developer, SiFive
10:00	15^'	Latest Progress of QEMU Community in RISC-V Ecosystem (2024-2025)	Zhiwei Liu Software Engineer, RISC-V & Ecosystem Department, Alibaba DAMO Academy
10:15	30^'	Tea Break	-
10:45	15^'	x264 RISCV Ecosystem Building and Optimization	Jiayan Qian Software Engineer, ByteDance
11:00	15^'	RISC-V in Data Center Software Ecosystem: Opportunities and Challenges	Yunxiang Jia RISC-V Ecosystem leader Software Architecture Design and Performance Expert, ZTE
11:15	15^'	Shape graphic for RISC-V	Zheng Zhang Principal Solutions Architect, Imagination Technologies
11:30	15^'	The Road to RISC-V Server Standardization:UEFI boot, Boot and Runtime Services	Zhen Liu Firmware Engineer, Software college, Shandong University Evan Chai Senior Technical Expert, Alibaba DAMO Academy
11:45	15^'	RVCK Project: Driving openEuler on RISC-V	Jingwei Wang OS Engineer, openEuler TC Member Institute of Software, Chinese Academy of Sciences
12:00	90^'	Lunch	-
13:30	15^'	Porting OP-TEE on RISC-V: A Practical Guide and Introduction	Peter Lin RISC-V System Software Developer, SiFive
13:45	15^'	Architecting TEEs with RV-ACRN Hypervisor on RISC-V Platforms	Haicheng Li System Software Architect, Intel
14:00	15^'	Towards Secure Container Infrastructure on RISC-V: the Development from rust-vmm to Kata-Containers	Ruoqing He Software Engineer, Institute of Software, Chinese Academy of Sciences
14:15	15^'	A Standard-compliant High Performance RISC-V Desktop Virtualization Platform	Ken Xia Software Director, UltraRISC
14:30	15^'	Enabling System Standby with RISC-V Platform	Fengxue Zhang Senior Engineer, Alibaba DAMO Academy
14:45	15^'	Exploration of Virtualization Technology Based on BeiHai Cloud Computing Experimental Platform	Tianzheng Li Researcher, China Telecom Research Institute
15:00	30^'	Tea Break	-
15:30	15^'	Golang on RISC-V: the Status and the Future	Pengcheng Wang Compiler Engineer, ByteDance Meng Zhuo RISC-V Developer, ISCAS
15:45	15^'	V8 for RISC-V One-Year Progress: What’s New	Yahan Lu Complier Enginer, PLCT lab, Institute of Software, Chinese Academy of Sciences
16:00	15^'	Optimizing Audio Algorithms on RISC-V Architecture	Jiandong Qiu Foundational Software Engineer, Nuclei
16:15	15^'	Introduce the Implementation of LLVM Loop Vectorizer	Liqin Weng Compiler Expert, SpacemiT
16:30	15^'	RISC-V Unified Database	Afonso Oliveira Senior Software Engineer, Synopsys
16:45	15^'	Enabling Native Library Support for QEMU-User on RISC-V	Yun Wang PhD Candidate, Shanghai Jiao Tong University
17:00	15^'	rv64.zip:Unifying Diverse RISC-V ISA Eco-system	Yangyu Chen PhD Student, Chongqing University Intern, Beijing Institute of Open Source Chip
17:15	15^'	Deploying openEuler RISC-V Everywhere: Adoption of Diversified Hardware Platforms	Hangfan Li OS Engineer, Institute of Software, Chinese Academy of Sciences

Embedded System
Host：
Xiaoqing He Secretary General, Embedded Systems Association Director, China Software Industry Association
Puxiang Xiong Founder and CEO, RT-Thread
7/18 9:00-12:00Room 305

Time	Duration	Title	Speaker
9:00	15^'	RISC-V Is Thriving, Diversify the Chip Ecosystem	Frank Xu Principal Analyst, Informa TechTarget
9:15	15^'	High-Determinism Real-Time RISC-V CPU with Functional Safety Features	Xiaogeng Wang Head of the Processor Department, ESWIN Computing
9:30	15^'	GS32-DSP Based on Nuclei RISC-V IP: A Technology Share for Domestic Replacement	Alex Chen CEO, Gejian Semiconductor
9:45	15^'	RISC-V based SoC Platform Integrating GNSS and BLE Technologies	Yi Zeng Senior Director, Wireless IP Platform, VeriSilicon
10:00	15^'	RISC-V-Based, BLE-Integrated Ultra-Low-Power MCU and Its Smart Healthcare Applications	Tingting Gao R&D Director, VeriSyno
10:15	30^'	Tea Break	-
10:45	15^'	Scaling RISC-V Performance: Multicore RTOS for Real-Time Demands	Puxiang Xiong Founder and CEO, RT-Thread Chairman, Shanghai Open-Source Information Technology Association
11:00	15^'	The Evolution of HPMicro High-Performance MCUs in Robotic Motion Control	Jintao Zeng Founder and CEO, HPMicro
11:15	15^'	How to Elevate the Security Level of RISC-V Based SoC Designs with a RISC-V Based Root-of-Trust	Samuel Chiang Business Development Director APAC, Rambus
11:30	15^'	Nuclei TEE: RISC-V Secure System Practice	Bing Gui Senior SW Engineer, Nuclei
11:45	15^'	Ecosystem-Driven Innovation: GPU and RISC-V Collaborating for Smarter Automotive Solutions	Yin Huang Senior Business Development Manager, Imagination

Automotive Electronics
Host：
Bob Hu Founder, Nuclei
Ning He Senior Vice President & CTO, ESWIN Computing
7/18 13:30-17:30Room 305

Time	Duration	Title	Speaker
13:30	15^'	Integrate into the RISC-V Ecosystem to Promote the Industrialization of Vehicle-Grade MCUs	YongZhou Chen CTO, Wuhan Binary Semiconductor Co., Ltd.
13:45	15^'	Intelligent Vehicle Enablement: ESWIN's RISC-V Automotive Computing Matrix with Integrated Safety Architecture	Patrick Chen Head of ABU MCU+ Development Center, ESWIN Computing
14:00	15^'	Functional Safety and Practice in Automotive Software Development	Jun Sun Vice President of Intelligent Drive Research Institute, ROXMOTOR
14:15	15^'	RISC-V-Based Automotive Security Framework	Paul Ku Deputy Director, Andes
14:30	15^'	Accelerating RISC-V Automotive Application Development: Challenges, Measures and IAR Practices	Brendan Pan Senior Engineer, IAR Systems China
14:45	15^'	Automotive Basic Software Solution Based on RISC-V Architecture	Yanan Zhao Automotive Base Software Expert, HiRain
15:00	15^'	Nuclei ASIL B/D RISC-V IP Automotive Implementation Challenges and Solutions	Tianbin Fan Automotive Product Manager, Nuclei
15:15	30^'	Tea Break	-
15:45	15^'	EasyXMen Support the Development of RISC-V Hardware and Software Collaborative Ecosystem	Xiaoxian Zhang Deputy General Manager of iSOFT, President of iSOFT Strategic Research Institute
16:00	15^'	An Introduction to a Configurable High-Performance Automotive Domain Controller	Weili Li CPU Architect at XuanTie Team, Alibaba DAMO Academy
16:15	15^'	HighTec Helps Rapid Development of RISC-V Automotive MCUs	Jihui Wen CTO, HighTec CN
16:30	15^'	RISC-V Automotive-Grade Compiler: Challenges and Solutions	Can Hu CMO, Terapines Technology
16:45	15^'	RISC-V Based Virtual Prototype, Accelerate Auto Software Development	Tieyang Wu Co-founder, IDEON Representative, MachineWare China
17:00	15^'	RISC-V Architecture Enable Self-reliance in Smart Vehicle Chips	Changfeng Cao Chairman of Cercis-Semi
17:15	15^'	RISC-V in Vehicles: Reshaping Software-defined Vehicles with an Open Ecosystem	John Zhang Vice President, Shanghai Zhicong

EDA
Host：
Xiaozhong Wu Vice President, UniVista
Yingren Chen Vice President, S2C
7/18 9:00-12:30Room 302

Time	Duration	Title	Speaker
9:00	20^'	SVM: A Synthesizable Approach to Efficient RISC-V CPU Verification	Yinan Xu Special Research Assistant, Institute of Computing Technology, Chinese Academy of Sciences (ICT, CAS) Special Research Assistant, Beijing Institute of Open Source Chip
9:20	20^'	Large-Scale FPGA Prototyping Methodology for Multi-Core High-Performance RISC-V Processors	Mengxia Cao Verification Product Line Marketing Director, UniVista
9:40	20^'	Tessent UltraSight-V: An On-chip Debug and Trace Solution for RISC-V Systems	Yifan Li Account Technology Manager, SIEMENS EDA
10:00	20^'	Nuclei Model: A SystemC-Based Near Cycle Model	Zitai Xu Technology Modeling Engineer, Nuclei
10:20	30^'	Tea Break	-
10:50	20^'	Accelerating Custom RISC-V Instruction Development with Andes' ACE Framework and AndesCycle	ChingChe Yen Software Engineer, Andes Technology
11:10	20^'	Leveraging Transaction-Based Acceleration for High-Speed, High-Quality RISC-V Verification	Dehao Yang Senior Software Development Engineer, S2C
11:30	20^'	Test Generation for RISC-V HPC Verification Challenges	Yujie Fan Application Engineer, Synopsys
11:50	20^'	RISC-V MMU Verification of Virtualization and Hypervisor Operation for CPU and SOC Platforms	Adnan Hamid Founder and CTO, Breker Verification Systems
12:10	20^'	RISC-V Chip Design Solution Based on Open-Source IP and Open-Source EDA	Biwei Xie Associate Professor, Institute of Computing Technology, Chinese Academy of Sciences (ICT, CAS)

Cutting-edge Technology Innovation
Host：
Jun Han Professor, Fudan University; Director, IP & Architecture Innovation Center, National Key Lab of Integrated Chips and Systems
Bo Huang Distinguished Professor, School of Data Science and Engineering, East China Normal University
7/18 13:30-17:30Room 302

Time	Duration	Title	Speaker
13:30	20^'	Energy-Efficient Embodied Intelligence Computing Architecture and Chips	Hongbin Sun Professor, Institute of Artificial Intelligence and Robotics, Xi’an Jiaotong University
13:50	20^'	RISC-V Secure Isolation via Hardware‒Software Co-Design: a Case Study of Penglai	Yubin Xia Professor, Shanghai Jiao Tong University
14:10	20^'	LLM-aided Agile Design Methodologies for RISC-V SoC	Tianyu Jia Assistant Professor, the School of Integrated Circuits, Peking University
14:30	20^'	Hardware Page Automated Design and Verification Based on Large Language Models	Di Zhao Associate Professor, Institute of Computing Technology, Chinese Academy of Sciences Honggang Qi Professor, University of Chinese Academy of Sciences
14:50	20^'	Addressing Real-time Application Requirements with RISC-V Advanced Interrupt Architecture Extensions	Rich Collins Sr. Director, Product Management - ARC-V Processors and Ecosystem, Synopsys
15:10	30^'	Tea Break	-
15:40	20^'	Achieving Persistent Tagging for Robust Stack Memory Error Protection	Carlo Ramponi PhD Security Researcher, University of Trento
16:00	20^'	Extending RISC-V into VLIW/SIMD Architectures for Application-Specific Workloads	Ella Mao Staff Applications Engineer, Synopsys
16:20	20^'	Latest RISC-V Instruction for DSP and Innovation Application of DSA in the Field of Wireless Communication	Gaoshan Li Senior Expert, Chip Architecture Design, Xinsheng Technology
16:40	20^'	Sophon: A Time-Repeatable and Low-Latency Architecture for Embedded Real-Time Systems	Zhe Huang Engineer, Peng Cheng Laboratory
17:00	15^'	High-Performance RISC-V SoC Architectures: Current Progress and Future Roadmap	Xiaofei Ni Head of R&D Center in Wuxi, Timesintelli Technology
17:15	15^'	Trends and Applications of Chiplet-Integrated Advanced Packaging	Wenliang Dai Founder & CEO, Xpeedic

Investment and M&A
Host：
Lin Wang Managing Partner, Walden International
Fei Fei General Manager, Shanghai Fortera Capital
7/18 9:00-12:00Room 204

Time	Duration	Title	Speaker
09:00	10^'	Opening Remarks	Leader Forum Chairperson
09:10	20^'	Sharing on the Investment Ecosystem Layout of RISC-V Industry	Fei Fei General Manager, Fortera Capital
09:30	20^'	Current Situation and Outlook of Investment and Mergers & Acquisitions in the Chip Design Industry	Yuwang Sun Partner President, China Forture-Tech Capital
09:50	20^'	Some Thoughts on the Integration Trends and Transaction Practices in the Chip Industry	Zhiang Jiang Head of Strategic Planning, Investment and M&A, 3peak
10:10	20^'	Overview and Trends of the Recent A-Share M&A and Restructuring Market	Di Zuo Managing Director, Huatai United S ecurities
10:30	30^'	Tea Break	-
11:00	30^'	Panel Discussion I:Bridge of Eco-Finance	Moderator: Haisheng Zhao Panelist: Lingrui Zhixin, Spacemit, WingSemi Technology, Walden International, China Construction Bank, Stock Equity
11:30	30^'	Panel Discussion II:Decoding Mergers and Acquisitions Targets	Moderator: Haisheng Zhao Panelist: VeriSilicon, Brite Semiconductor, Southchip, Giantec, Telink, UNIVISTA, Zhangjiang Hi-Tech

Education & Talent Development
Host：
Pingqiang Zhou Vice Dean & Professor, School of Information Science and Technology, ShanghaiTech University
Xiaojun Guo Executive Vice Dean, School of Integrated Circuits, Shanghai Jiao Tong University
7/18 13:30-17:30Room 204

Time	Duration	Title	Speaker
13:30	20^'	"One Student One Chip" Initiative: Learn to Build RISC-V Chips from Scratch with MOOC	Zihao Yu PhD, Institute of Computing Technology, Chinese Academy of Sciences Engineer, Beijing Institute of Open Source Chip
13:50	20^'	Teaching Computer Architecture and AI Accelerator Design through the RISC-V Ecosystem	Siting Liu Assistant Professor with the School of Information Science and Technology, ShanghaiTech University
14:10	20^'	Teaching and Practice Application of Embedded Systems Based on RISC-V Processor	Jinlong Lin Professor, the School of Software and Microelectronics, Peking University Allan He Secretary General, the Embedded Systems Association Deputy Editor-in-Chief, Embedded Technology and Intelligent Systems Founder, BMR
14:30	20^'	Digital Logic and SoC Design Education Practice Integrating RISC-V Open Platform	Yanan Sun Associate Professor, School of Integrated Circuits, Shanghai Jiao Tong University
14:50	20^'	"Dongshan" RISC-V Talent Cultivation Program	Hongjun Dai Professor, Academy of Intelligent Innovation and Shool of Software, Shandong University
15:10	20^'	Teaching Practice of RISC-V Processor and DFT Technology for Postgraduates	Feng Liang Professor, School of Microelectronics, Xi’ an Jiaotong University
15:30	30^'	Tea Break	-
16:00	20^'	Educational Solutions and Early Practices Based on RISC-V	Spark Fan Sales Director, StarFive Technologies
16:20	20^'	RISC-V Software Development and VESC Introduction	Alex Lin Software Director, VeriSilicon
16:40	50^'	Panel Discussion: Co-creation, Sharing and Co-cultivate: Open Source "RISC-V Introduction" Courseware Empowers a New Talent Training Ecosystem in Universities	Moderator: Wayne Dai Chairman, SOPIC Panelist: Bob Hu Founder, Nuclei Jiangang Duan Senior Advisor, SOPIC Zhuo Zou Professor, School of Information Science and Technology, Fudan University Yanan Sun Associate Professor, School of Integrated Circuits, Shanghai Jiao Tong University Rui Zhang Senior Engineer, College of Computer Science and Artificial Intelligence, Fudan University Deputy director of National Demonstration Center for Experimental Computer Education Feng Liang Professor, School of Microelectronics, Xi’ an Jiaotong University

Artificial IntelligenceHost：Xiaoyan Xiang Processor Architect, Xuantie, DAMO AcademyWei Chen Executive Vice President, Stream Computing; Vice Chairman, RISC-V International AI/ML SIG7/18 9:00-17:00Zhangjiang Hall

High-Performance ComputingHost：Jianyi Meng CEO of Zhihe Computing, Chief Scientist at Alibaba DAMO Academy, Rotating Chair of RVEI Technical CommitteeTao Xu Founder & CEO, StarFive Technology7/18 9:00-17:15Inspire Hall

Software & EcosystemHost：Yanjun Wu Deputy Director & Chief Engineer, Institute of Software, Chinese Academy of SciencesJiangang Duan R&D Director, Intel ChinaSenior Advisor, Shanghai Open Processor Industry Innovation Center (SOPIC)7/18 9:00-17:30Room 304

Embedded SystemHost：Xiaoqing He Secretary General, Embedded Systems Association Director, China Software Industry AssociationPuxiang Xiong Founder and CEO, RT-Thread7/18 9:00-12:00Room 305

Automotive ElectronicsHost：Bob Hu Founder, NucleiNing He Senior Vice President & CTO, ESWIN Computing7/18 13:30-17:30Room 305

EDAHost：Xiaozhong Wu Vice President, UniVistaYingren Chen Vice President, S2C7/18 9:00-12:30Room 302

Cutting-edge Technology InnovationHost：Jun Han Professor, Fudan University; Director, IP & Architecture Innovation Center, National Key Lab of Integrated Chips and SystemsBo Huang Distinguished Professor, School of Data Science and Engineering, East China Normal University7/18 13:30-17:30Room 302

Investment and M&AHost：Lin Wang Managing Partner, Walden InternationalFei Fei General Manager, Shanghai Fortera Capital7/18 9:00-12:00Room 204

Education & Talent DevelopmentHost：Pingqiang Zhou Vice Dean & Professor, School of Information Science and Technology, ShanghaiTech UniversityXiaojun Guo Executive Vice Dean, School of Integrated Circuits, Shanghai Jiao Tong University7/18 13:30-17:30Room 204

Artificial Intelligence
Host：
Xiaoyan Xiang Processor Architect, Xuantie, DAMO Academy
Wei Chen Executive Vice President, Stream Computing; Vice Chairman, RISC-V International AI/ML SIG
7/18 9:00-17:00Zhangjiang Hall

High-Performance Computing
Host：
Jianyi Meng CEO of Zhihe Computing, Chief Scientist at Alibaba DAMO Academy, Rotating Chair of RVEI Technical Committee
Tao Xu Founder & CEO, StarFive Technology
7/18 9:00-17:15Inspire Hall

Software & Ecosystem
Host：
Yanjun Wu Deputy Director & Chief Engineer, Institute of Software, Chinese Academy of Sciences
Jiangang Duan R&D Director, Intel China
Senior Advisor, Shanghai Open Processor Industry Innovation Center (SOPIC)
7/18 9:00-17:30Room 304

Embedded System
Host：
Xiaoqing He Secretary General, Embedded Systems Association Director, China Software Industry Association
Puxiang Xiong Founder and CEO, RT-Thread
7/18 9:00-12:00Room 305

Automotive Electronics
Host：
Bob Hu Founder, Nuclei
Ning He Senior Vice President & CTO, ESWIN Computing
7/18 13:30-17:30Room 305

EDA
Host：
Xiaozhong Wu Vice President, UniVista
Yingren Chen Vice President, S2C
7/18 9:00-12:30Room 302

Investment and M&A
Host：
Lin Wang Managing Partner, Walden International
Fei Fei General Manager, Shanghai Fortera Capital
7/18 9:00-12:00Room 204

Education & Talent Development
Host：
Pingqiang Zhou Vice Dean & Professor, School of Information Science and Technology, ShanghaiTech University
Xiaojun Guo Executive Vice Dean, School of Integrated Circuits, Shanghai Jiao Tong University
7/18 13:30-17:30Room 204