The 3ʳᵈ Dishui Lake China RISC-V Industry Forum Ends Successfully

August 28, 2023, Shanghai -- The 3rd Dishui Lake China RISC-V Industry Forum (referred to as the Dishui Lake Forum) was held at the InterContinental Shanghai Lingang, co-hosted by the China RISC-V Industry Consortium (CRVIC) and VeriSilicon Microelectronics (Shanghai) Co., Ltd. (referred to as VeriSilicon), with support from the Administration Committee of Lin-gang Special Area of the China (Shanghai) Pilot Free Trade Zone, Shanghai Lingang Science and Technology Innovation City Economic Development Co., Ltd, and the Shanghai Integrated Circuit Industry Association. The forum aimed to advance the RISC-V ecosystem and promote the industrialization and application innovation of RISC-V chips in China.

The forum brought together nearly 200 attendees, including government officials, leaders and experts from associations, universities, and research institutions, executives from RISC-V industry chain companies, and media representatives. The forum also drew over 18,000 online viewers, with up to 85 reports published on the same day and over 130 post-event articles.

Jianying Peng, Secretary-General of CRVIC and CEO of Nuclei System Technology Co., Ltd, moderated the forum. In his opening remarks, Wayne  Dai, Chairman of CRVIC and Founder, Chairman, and CEO of VeriSilicon, reviewed the domestic RISC-V chips introduced at the previous forum and their mass production status. He noted that some of the RISC-V chips showcased in past forums have already achieved mass production in the tens of millions — primarily in IoT applications. This year’s submissions signal a shift that RISC-V is breaking into high-performance applications. This proves that the forum’s influence has grown alongside China’s RISC-V industry. Moving forward, the forum will collaborate with industry stakeholders to further drive the prosperity of the RISC-V ecosystem.

Founder, Chairman, and CEO of VeriSilicon

Wenkan Tang, Deputy Director of Shanghai Municipal Commission of Economy and Informatization, Xiaohua Wu, Deputy Party Secretary of the Party Working Committee of Lin-gang Special Area, Yiwu Guo, Secretary-General of Shanghai Integrated Circuit Industry Association, and Calista Redmond, CEO of RISC-V International delivered speeches at the forum, expressing high recognition and best wishes for the Dishui Lake Forum.

Wenkan Tang

Deputy Director of Shanghai Municipal Commission of Economy and Informatization

 

Xiaohua Wu

Deputy Party Secretary of the Party Working Committee of Lin-gang Special Area

 

Yiwu Guo

Secretary-General of Shanghai Integrated Circuit Industry Association

 

During the forum, the world's first RISC-V patent alliance was officially established, with its founding members - VeriSilicon, Nuclei System Technology, T-Head, StarFive, Timesintelli Technology, S2C, Juquan Technology, VeriSyno, and Shanghai Hengrui Intellectual Property Services Co., Ltd (iFuture) - attended the ceremony. The alliance aims to build a litigation-free patent ecosystem for RISC-V, fostering continuous innovation and rapid development of the technology.

Xiaohua Wu, Deputy Party Secretary of the Party Working Committee of Lin-gang Special Area, officially designated VeriSilicon as the RISC-V ecosystem anchor company of Lin-gang Special Area. This recognition positions VeriSilicon as the driving force behind for RISC-V industry development in Lin-gang Special Area, with responsibility for coordinating supply chains and shaping the local semiconductor ecosystem.

 Wei-Han Lien, Chief CPU Architect of Tenstorrent, delivered a keynote speech titled "RISC-V Accelerating Digital Transformation." He elaborated on how to build scalable heterogeneous computing systems by leveraging AI technology, open-source RISC-V instruction sets, and flexible Chiplet architecture, aiming to address ubiquitous computing demands of the digital era.

Chief CPU Architect of Tenstorrent

 

In the product presentation session, the following companies delivered speeches and collectively launched 10 new domestic RISC-V chip products covering cloud computing, AI, automotive, industrial security, and other application fields: Xiamen Sophgo Technologies Co., Ltd, Suzhou Kuhan Technology Co., Ltd, Shenzhen Intellifusion Technologies Co., Ltd, Zhuhai Spacetouch Co., Ltd, Guangdong Jiangxinchuang Technology Co., Ltd (ArtInChip), ChipEXT Semiconductor Co., Ltd, GigaDevice Semiconductor Inc., Nanjing InnoChip Technology Co., Ltd, Nanjing Qinheng Microelectronics Co., Ltd, and Sansec Technology Co., Ltd.

 

01 SG2042: 64-bit Multi-core Server CPU

Jinian Lu

Product Director

Xiamen Sophgo Technologies Co., Ltd

The SG2042 chip is a 64-bit multi-core processor developed by Sophgo Technologies based on high-performance RISC-V cores, with a 2 GHz clock frequency and 64 MB system cache. It primarily provides a flexible foundation for next-generation cloud computing, AI, data analysis, networking and storage workloads, delivering excellent performance for various data-intensive and I/O-intensive workloads.

02 eSPU: High-Efficiency Data Storage and I/O Management Infrastructure Chip

Yanan Liu

Vice President of Systems Engineering

Suzhou Kuhan Technology Co., Ltd

The eSPU chip from Kuhan Technology primarily targets I/O-intensive scenarios such as storage, networking, and AI. It meets the technical requirements of cloud computing and edge computing data centers for high bandwidth, low latency, and high energy efficiency in IT infrastructure. The chip can significantly reduce the investment, operational, and energy consumption costs of digital economy IT infrastructure, delivering 10 million IOPS read/write performance and 400Gbps RDMA network bandwidth at just 100W power consumption.

03 DeepEdge10V: The First AP-Level Edge AI SoC with 12 TOPS High Computing Power

Fulin Zhang

Developed by Intellifusion, DeepEdge10V is an edge AI SoC chip with high computing power, featuring full domestic production, high performance, and high integration. It supports mainstream model frameworks such as PyTorch, ONNX, and Caffe, as well as deep learning network models including CNN, RNN, Transformer, and GNN. It is primarily designed for edge computing scenarios such as video analytics terminals, industrial smart gateways, robotics, education, and IT innovation.

04 SPV60 Series: A New Generation of End-Side AI Audio/Weak Vision Processor Chips

Yingzhe Hu

CEO

Zhuhai Spacetouch Co., Ltd

The SPV60 series is a next-generation on-device AI audio and low-power vision processor chip developed by Spacetouch. It adopts a multi-core heterogeneous architecture, integrating an Andes D25F RISC-V CPU, Spacetouch-developed μDSP, and an AI NPU. The CPU operates at speeds up to 400 MHz, while the NPU delivers a computing power of 100 GOPS. The chip also features high-performance audio AD/DA converters and a rich set of peripheral interfaces. Supported by Spacetouch’s comprehensive development tools and reference designs, it is widely applicable in fields such as smart voice, intelligent earphones, professional audio, and low-power vision.

05 D13 Series: High-Performance Industrial Display & Control MCU

Dazhi Wang

Co-Founder and R&D Director

Guangdong Jiangxinchuang Technology Co., Ltd (ArtInChip)

 

The D13 series is an industrial-grade display and control MCU developed by ArtInChip, utilizing advanced manufacturing processes and T-Head's high-performance RISC-V processor architecture. It features powerful display capabilities, a high-speed real-time hardware control engine, and a rich set of peripherals and connectivity interfaces. Widely applicable in industrial automation, photovoltaic & renewable energy, medical equipment, industrial/automotive HMIs, and smart home appliances, the D13 series delivers robust human-machine interaction, computing, and control performance.

06 CX3288: RISC-V-Based High-Performance Automotive MCU

Chao Wang

Senior Technical Marketing Director

ChipEXT Semiconductor Co., Ltd

 

CX3288 is a high-performance automotive MCU developed by ChipEXT Semiconductor based on RISC-V architecture. The chip adopts a 32-bit RISC-V core supporting floating-point instructions, achieves a main frequency of 300+ MHz, and provides up to 2 MB flash memory. It integrates a hardware security module (HSM) and rich peripheral resources such as Ethernet/CAN. Targeting applications including body control, vehicle domain control, smart cockpits, energy storage BMS, and high-end industrial fields, it delivers robust computing and control capabilities.

07 GD32V Series: Innovative RISC-V MCU with Wireless Connectivity for AIoT Applications

Jie Xu

Ecosystem Marketing Manager

GigaDevice Semiconductor Inc.

The GD32V series is a RISC-V MCU developed by GigaDevice that delivers high clock speeds and large memory capacity. Featuring extensive peripheral interfaces and hardware encryption capabilities, it enables cost-effective yet secure and reliable IoT solutions.

08 LM600: World's First RISC-V-Based 4G Cat1 Wide-Area IoT Chip

Jin Zhou
Vice President
Nanjing InnoChip Technology Co., Ltd

Launched by InnoChip, LM600 is the world's first RISC-V-based 4G Cat1 wide-area IoT chip, featuring three key advantages: ultra-low power consumption, high integration, and high sensitivity. With standby current as low as 0.9 mA in DRX mode, it integrates five major functional components - baseband, RF, memory, power supply, and physical SIM card - primarily targeting wide-area IoT applications.

09 CH32: Qingke RISC-V Core Full-Stack USB/Bluetooth/Ethernet MCU

Yukai Tao

CH32V208 is the star product of Qinheng’s CH32 series, integrating peripherals such as Bluetooth LE, USB, Ethernet, CAN, and 4*UART. The CH32 series RISC-V MCUs feature self-developed core peripheral IP for USB/Bluetooth/Ethernet. They integrate and embed various vertical IPs and even software protocol stacks required for target applications, bridging the data chain from PHY to controller and protocol stack. The MCUs demonstrate better hardware-software coordination, facilitating global optimization for applications to further enhance high-frequency/high-speed performance while reducing power consumption and chip packaging costs.

10 XT200: Low-Power Cryptographic Chip for IoT and IoV Applications

Changsong Zhao

Director of R&D Center

Sansec Technology Co., Ltd.

The XT200 series IoT security chip is a low-cost, low-power cryptographic chip developed by Shandong Duocifang Semiconductor Co., Ltd. for security applications in IoT and IoV. This chip is designed with a domestic 32-bit RISC-V processor with communication interfaces including GMAC, USB, UART, SPI, I2C, and CAN. It is compatible with mainstream embedded RTOS, and has obtained China's Class II Commercial Cryptography Certification. It is a chip product suitable for data security, IoV, security gateways, and industrial internet markets.

 

Following the product presentation session, Dr. Dai moderated a panel discussion titled "Three Critical Issues for China's RISC-V Industry Development: Software Ecosystem, Patent Protection, and Talent Cultivation." The discussion brought together panelists from Red Hat, Tenstorrent, Sophgo Technologies, Nuclei System Technology, theSchool of Integrated Circuits of Tsinghua University, and Zhejiang Ocean University to examine challenges in RISC-V industry development. The key discussion points include implementation strategies for high-end applications such as automotive electronics and servers, mitigation approaches for potential patent risks, enhancement of open-source software ecosystems, and industry-academia collaboration models for RISC-V talent development. The panelists engaged in vibrant exchanges while conducting real-time polling with both on-site and online participants, collectively brainstorming solutions to advance industry progress.

 

Live Poll Results from the Panel Discussion

Topic 1: In which application domains is RISC-V likely to become a mainstream processor architecture (with market share exceeding 1/3)? Why?

Poll: In which application domains is RISC-V likely to become a mainstream processor architecture (with market share exceeding 1/3)? (Select top 3 choices)

Topic 2: Between automotive electronics and servers - two high-end application areas for RISC-V - which one is relatively easier to implement? Why?

Poll: Between automotive electronics and servers - two high-end application areas for RISC-V - which one is relatively easier to implement? (Single choice)

Topic 3: How can we improve the RISC-V open-source software ecosystem to accelerate chip adoption?

Poll: Should Chinese RISC-V companies join organizations like RISE or establish domestic software ecosystem initiatives? (Single choice)

 

During the forum, an exhibition area featured technology and product displays from Administration Committee of Lin-gang Special Area, VeriSilicon, Nuclei System Technology, and seven of the presenting companies. The exhibits attracted numerous attendees for in-depth technical exchanges.

 

ABOUT SOPIC

Established in September 2024 in Zhangjiang, Pudong, Shanghai, the Shanghai Open Processor Industry Innovation Center (SOPIC) is headquartered on the 15th floor of Building 1, Chuangxin Tiandi, No. 52 Jichuang Road. As a non-profit organization, it was co-founded by leading domestic semiconductor design companies including VeriSilicon, Nuclei Technology, and DAMO Academy (Shanghai).

SOPIC serves as an industrial nexus bringing together RISC-V ecosystem stakeholders, including chip designers, IP vendors, system integrators, software developers, OEMs, and top-tier research institutions, to co-develop critical generic technology platforms. By fostering open hardware architecture to accelerate open-source software ecosystems, the center drives the industrialization and commercial deployment of RISC-V technologies.

Complementing its technical mission, SOPIC partners with China's leading universities through three integrated channels: co-developing RISC-V-specific curricula, establishing joint research laboratories, and creating applied training centers. This tripartite approach systematically cultivates professionals with cross-functional RISC-V expertise, ensuring a sustainable talent pipeline to power the ecosystem's evolution.