The 3ʳᵈ Session of the Pilot Program of RISC-V Graduate Elective Course Concluded Successfully

May 24-25, 2025 -- The 3ʳᵈ session of the pilot program of the RISC-V graduate elective course was successfully held at the VeriSilicon Building in Lingang Innovation Crystal Building, Shanghai. Co-organized by the Shanghai Open-Source Processor Innovation Center (SOPIC) and VeriSilicon Technology (Shanghai) Co., Ltd., the event brought together 21 faculty members from 14 leading Chinese universities, alongside industry experts, to collaboratively refine the course materials for "Introduction to RISC-V: From Design to Application". The participating universities included Fudan University, Shanghai Jiao Tong University, Tongji University, ShanghaiTech University, Shanghai University, Tsinghua University, Peking University, Zhejiang University, University of Electronic Science and Technology of China, Xi’an Jiaotong University, Shandong University, Southeast University, Nanjing University, and Guilin University of Electronic Technology.

At the beginning, Dr. Wayne Dai, Chairman of SOPIC, delivered a keynote speech emphasizing the course's dual mission. According to Dr. Dai, the course must achieve precise positioning – it should not only establish fundamental theoretical knowledge but also elevate students' understanding through cutting-edge applications. In addition, the course should offer upgraded engineering experience with lab-based projects, while offering expanded industry perspectives with cross-domain case studies. He added that the official release of the RISC-V elective course materials will serve as a highlight of the 2025 RISC-V Summit China, playing a pivotal role in advancing talent cultivation in higher education and accelerating the adoption of RISC-V technology.

Wayne Dai 

Chairman, China RISC-V Industry Consortium (CRVIC)

Founder, Chairman, and CEO of VeriSilicon

The session focused on detailed course content optimization and practical teaching implementation. Experts conducted in-depth discussions on teaching logic for explaining RISC-V instruction sets and selection of case studies materials. Professor Tao Xie, Secretary-General of SOPIC, Zhenbo Hu, founder of Nuclei System Technology, Jianying Peng, Vice Chairman of SOPIC, and Jiangang Duan, Senior Consultant of SOPIC shared industry insights on RISC-V technical advancement, application landscapes, and latest trends. The participants also came up with specific revision suggestions for the course materials.

Professor Siting Liu from ShanghaiTech University, professor Yanan Sun from Shanghai Jiao Tong University, professor Rui Zhang from Fudan University, and professor Feng Liang from Xi'an Jiaotong University delivered reports on the revision for "CPU and RISC-V Processor Architecture", "RISC-V SoC Hardware Overview", "RISC-V Embedded Software Development" and "RISC-V in the Era of Intelligent Computing", respectively.

To meet universities' educational needs, a dedicated session on "Development Platforms and Competition Case Studies" was held. Mr. Shifang Lin, Director of Software Development Technology at VeriSilicon, presented a low-power RISC-V development board tailored for academic use. He provided a detailed overview of the board's applications in embedded software development education. He also introduced the projects that utilized this board during the past three embedded software development competition.

Shifang Lin

Director of Software Development Technology, VeriSilicon Technology

During the thematic discussion session on the second day, experts engaged in deliberations around technical topics such as large model acceleration and Domain-Specific Architecture (DSA). The session systematically clarified the boundary definitions between the easily confused concepts of "open source" and "openness", establishing a unified technical language for industry promotion. These breakthroughs from technological frontiers to conceptual standardization will promote coordinated development between the RISC-V education system and industrial ecosystem.

In his concluding remarks, Dr. Dai pointed out that the participants should not only complete course material development on schedule, but also expand explanations of the course framework, come up with detailed lesson plans, curate reference literature, and propose complete teaching guidance. The aim is to ensure smooth implementation of the course this fall. In addition, suggestions for graduate thesis topics should be also provided so as to create a closed-loop pathways from lectures, to thesis, and corporate Internships

The event concluded with a Dishui Lake sailing excursion sponsored by VeriSilicon, creating a natural setting for in-depth discussions among educators.

This session systematically refined the RISC-V graduate elective curriculum, delivering well-structured course materials and detailed teaching plans. It also strengthened collaboration between universities and industry partners while fostering deeper connections among faculty, paving the way for a shared, innovative approach to course development.

ABOUT SOPIC

Established in September 2024 in Zhangjiang, Pudong, Shanghai, the Shanghai Open Processor Industry Innovation Center (SOPIC) is headquartered on the 15th floor of Building 1, Chuangxin Tiandi, No. 52 Jichuang Road. As a non-profit organization, it was co-founded by leading domestic semiconductor design companies including VeriSilicon, Nuclei Technology, and DAMO Academy (Shanghai).

SOPIC serves as an industrial nexus bringing together RISC-V ecosystem stakeholders, including chip designers, IP vendors, system integrators, software developers, OEMs, and top-tier research institutions, to co-develop critical generic technology platforms. By fostering open hardware architecture to accelerate open-source software ecosystems, the center drives the industrialization and commercial deployment of RISC-V technologies.

Complementing its technical mission, SOPIC partners with China's leading universities through three integrated channels: co-developing RISC-V-specific curricula, establishing joint research laboratories, and creating applied training centers. This tripartite approach systematically cultivates professionals with cross-functional RISC-V expertise, ensuring a sustainable talent pipeline to power the ecosystem's evolution.